summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorrearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4>2018-05-11 09:28:10 +0000
committerrearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4>2018-05-11 09:28:10 +0000
commit887812fe72c1350b089df4dd79b9babbb19a72d8 (patch)
tree2f37b6ed2587c1087866f1f187be579bcb56c8b9
parentb16a51197d4f8ff4acd35f86f60af7b275bc2535 (diff)
[arm] PR target/85606 prefer armv6s-m for armv6-m parts
When Arm introduced ARMv6-M there were two variants, ARMv6-M and ARMv6S-M. The two differed only in support for the SVC instruction. Later on SVC was then made a mandatory part of ARMv6-M and the ARMv6S-M name was dropped. GCC and GAS, however still recognize both names and at least some versions of GAS still distinguish between the two. To address this, this patch changes the architecture for the ARMv6-m cortex parts (m0, m0plus, m1 and the variants will small multiply units) to use the ARMv6S-M name in conjunction with the assembler. This avoids problems with them rejecting code that was previously accepted with older versions of GCC where we did not pass an explicit architecture string through to the compiler when using -mcpu on the command line. PR target/85606 * config/arm/arm-cpus.in: Add comment that ARMv6-m and ARMv6S-m are now equivalent. (cortex-m0): Use armv6s-m isa. (cortex-m0plus): Likewise. (cortex-m1): Likewise. (cortex-m0.small-multiply): Likewise. (cortex-m0plus.small-multiply): Likewise. (cortex-m1.small-multiply): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@260157 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog12
-rw-r--r--gcc/config/arm/arm-cpus.in14
2 files changed, 20 insertions, 6 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 01d3b18ab446..434d44313038 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,15 @@
+2018-05-11 Richard Earnshaw <rearnsha@arm.com>
+
+ PR target/85606
+ * config/arm/arm-cpus.in: Add comment that ARMv6-m and ARMv6S-m are now
+ equivalent.
+ (cortex-m0): Use armv6s-m isa.
+ (cortex-m0plus): Likewise.
+ (cortex-m1): Likewise.
+ (cortex-m0.small-multiply): Likewise.
+ (cortex-m0plus.small-multiply): Likewise.
+ (cortex-m1.small-multiply): Likewise.
+
2018-05-11 Allan Sandfeld Jensen <allan.jensen@qt.io>
Jakub Jelinek <jakub@redhat.com>
diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in
index cc08f5a5192f..fce30e41af08 100644
--- a/gcc/config/arm/arm-cpus.in
+++ b/gcc/config/arm/arm-cpus.in
@@ -446,6 +446,8 @@ begin arch armv6-m
isa ARMv6m
end arch armv6-m
+# This is now equivalent to armv6-m, but we keep it because some
+# versions of GAS still distinguish between the two.
begin arch armv6s-m
tune for cortex-m1
base 6M
@@ -1168,21 +1170,21 @@ end cpu arm1156t2f-s
begin cpu cortex-m1
cname cortexm1
tune flags LDSCHED
- architecture armv6-m
+ architecture armv6s-m
costs v6m
end cpu cortex-m1
begin cpu cortex-m0
cname cortexm0
tune flags LDSCHED
- architecture armv6-m
+ architecture armv6s-m
costs v6m
end cpu cortex-m0
begin cpu cortex-m0plus
cname cortexm0plus
tune flags LDSCHED
- architecture armv6-m
+ architecture armv6s-m
costs v6m
end cpu cortex-m0plus
@@ -1192,7 +1194,7 @@ begin cpu cortex-m1.small-multiply
cname cortexm1smallmultiply
tune for cortex-m1
tune flags LDSCHED SMALLMUL
- architecture armv6-m
+ architecture armv6s-m
costs v6m
end cpu cortex-m1.small-multiply
@@ -1200,7 +1202,7 @@ begin cpu cortex-m0.small-multiply
cname cortexm0smallmultiply
tune for cortex-m0
tune flags LDSCHED SMALLMUL
- architecture armv6-m
+ architecture armv6s-m
costs v6m
end cpu cortex-m0.small-multiply
@@ -1208,7 +1210,7 @@ begin cpu cortex-m0plus.small-multiply
cname cortexm0plussmallmultiply
tune for cortex-m0plus
tune flags LDSCHED SMALLMUL
- architecture armv6-m
+ architecture armv6s-m
costs v6m
end cpu cortex-m0plus.small-multiply