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authorYao Qi <yao.qi@linaro.org>2017-10-23 14:52:28 +0100
committerChristoph Muellner <christoph.muellner@theobroma-systems.com>2018-04-27 14:38:50 +0200
commit3adb5fee9ee3d784d8547029be2cb07a4802ace8 (patch)
tree1773005896589d4f3183f7c0764d865d90b26342 /gdb/aarch64-tdep.c
parent4e556d512fa9014a7c68d33310171f18301236e4 (diff)
Rebased 5e5a2a68c772d59c41d4e536949ce4ba3dc9b3ea from linaro's gdb-aarch64-ilp32 branch on GDB 8.1-release. gdb: 2017-03-06 Andrew Pinski <apinski@cavium.com> Steve Ellcey <sellcey@cavium.com> Yao Qi <yao.qi@linaro.org> * aarch64-linux-nat.c (IS_ARM32): New macro. (fetch_gregs_from_thread): Use IS_ARM32 macro. (store_gregs_to_thread): Ditto. (fetch_fpregs_from_thread): Ditto. (store_fpregs_to_thread): Ditto. (ps_get_thread_area): Ditto. (aarch64_linux_siginfo_fixup): Ditto. * aarch64-linux-tdep.c (aarch64_linux_init_abi): Set link map offsets to 32 or 64 bits. * aarch64-tdep.c (aarch64_ilp32_register_type): New function. (aarch64_gdbarch_init): Setup ILP32 support. Make sure the gdbarches have compatible ilp32 flags. Set long and ptr sizes correctly for ilp32. * aarch64-tdep.h (gdbarch_tdep) <ilp32>: New field. gdb/gdbserver: 2017-03-06 Andrew Pinski <apinski@cavium.com> Steve Ellcey <sellcey@cavium.com> * linux-aarch64-low.c (aarch64_linux_read_description):
Diffstat (limited to 'gdb/aarch64-tdep.c')
-rw-r--r--gdb/aarch64-tdep.c35
1 files changed, 33 insertions, 2 deletions
diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c
index e4cd3b5b0b..0c7f1652cb 100644
--- a/gdb/aarch64-tdep.c
+++ b/gdb/aarch64-tdep.c
@@ -2083,6 +2083,22 @@ aarch64_gen_return_address (struct gdbarch *gdbarch,
}
+/* Implement the "register_type" gdbarch method.
+ Adjust the register type of $PC and $SP on ILP32. */
+
+static struct type *
+aarch64_ilp32_register_type (struct gdbarch *gdbarch, int regnum)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ gdb_assert (tdep->ilp32);
+
+ if (regnum == AARCH64_SP_REGNUM || regnum == AARCH64_PC_REGNUM)
+ return builtin_type (gdbarch)->builtin_uint64;
+ else
+ return tdesc_register_type (gdbarch, regnum);
+}
+
/* Return the pseudo register name corresponding to register regnum. */
static const char *
@@ -2859,6 +2875,10 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
const struct tdesc_feature *feature;
int num_regs = 0;
int num_pseudo_regs = 0;
+ bool ilp32 = false;
+
+ if (info.bfd_arch_info->mach == bfd_mach_aarch64_ilp32)
+ ilp32 = true;
/* Ensure we always have a target descriptor. */
if (!tdesc_has_registers (tdesc))
@@ -2916,6 +2936,9 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
best_arch != NULL;
best_arch = gdbarch_list_lookup_by_info (best_arch->next, &info))
{
+ /* ILP32 and LP64 are incompatible. */
+ if (gdbarch_tdep (arches->gdbarch)->ilp32 != ilp32)
+ continue;
/* Found a match. */
break;
}
@@ -2934,6 +2957,7 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
tdep->lowest_pc = 0x20;
tdep->jb_pc = -1; /* Longjump support not enabled by default. */
tdep->jb_elt_size = 8;
+ tdep->ilp32 = ilp32;
set_gdbarch_push_dummy_call (gdbarch, aarch64_push_dummy_call);
set_gdbarch_frame_align (gdbarch, aarch64_frame_align);
@@ -2981,9 +3005,9 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_float_bit (gdbarch, 32);
set_gdbarch_double_bit (gdbarch, 64);
set_gdbarch_long_double_bit (gdbarch, 128);
- set_gdbarch_long_bit (gdbarch, 64);
+ set_gdbarch_long_bit (gdbarch, ilp32 ? 32 : 64);
set_gdbarch_long_long_bit (gdbarch, 64);
- set_gdbarch_ptr_bit (gdbarch, 64);
+ set_gdbarch_ptr_bit (gdbarch, ilp32 ? 32 : 64);
set_gdbarch_char_signed (gdbarch, 0);
set_gdbarch_wchar_signed (gdbarch, 0);
set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
@@ -3026,6 +3050,13 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
tdesc_use_registers (gdbarch, tdesc, tdesc_data);
+ if (ilp32)
+ {
+ /* Override tdesc_register_type to adjust the types of $PC and
+ $SP in ILP32. */
+ set_gdbarch_register_type (gdbarch, aarch64_ilp32_register_type);
+ }
+
/* Add standard register aliases. */
for (i = 0; i < ARRAY_SIZE (aarch64_register_aliases); i++)
user_reg_add (gdbarch, aarch64_register_aliases[i].name,