diff options
author | Francis Visoiu Mistrih <francisvm@yahoo.com> | 2017-12-13 10:30:51 +0000 |
---|---|---|
committer | Francis Visoiu Mistrih <francisvm@yahoo.com> | 2017-12-13 10:30:51 +0000 |
commit | 2b16863067fa1f188f616f80ab6ea23e7d1cb7c1 (patch) | |
tree | 83d8573492cd0e0f3dd8ff264794178bdfe1dd65 | |
parent | c84690975acd7c5f43e4c44d4653a9f7e384ba8f (diff) |
[CodeGen] Print target index operands as target-index(target-specific) + 8 in both MIR and debug output
Work towards the unification of MIR and debug output by printing `target-index(target-specific) + 8` instead of `<ti#0+8>` and `target-index(target-specific) + 8` instead of `<ti#0-8>`.
Only debug syntax is affected.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320565 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | docs/MIRLangRef.rst | 16 | ||||
-rw-r--r-- | lib/CodeGen/MIRPrinter.cpp | 25 | ||||
-rw-r--r-- | lib/CodeGen/MachineOperand.cpp | 27 | ||||
-rw-r--r-- | unittests/CodeGen/MachineOperandTest.cpp | 30 |
4 files changed, 69 insertions, 29 deletions
diff --git a/docs/MIRLangRef.rst b/docs/MIRLangRef.rst index 82a61bcde86..b0e3984c338 100644 --- a/docs/MIRLangRef.rst +++ b/docs/MIRLangRef.rst @@ -615,6 +615,21 @@ If the identifier doesn't match the regular expression The unnamed global values are represented using an unsigned numeric value with the '@' prefix, like in the following examples: ``@0``, ``@989``. +Target-dependent Index Operands +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +A target index operand is a target-specific index and an offset. The +target-specific index is printed using target-specific names and a positive or +negative offset. + +For example, the ``amdgpu-constdata-start`` is associated with the index ``0`` +in the AMDGPU backend. So if we have a target index operand with the index 0 +and the offset 8: + +.. code-block:: text + + %sgpr2 = S_ADD_U32 _, target-index(amdgpu-constdata-start) + 8, implicit-def _, implicit-def _ + .. TODO: Describe the parsers default behaviour when optional YAML attributes are missing. .. TODO: Describe the syntax for the bundled instructions. @@ -631,6 +646,5 @@ the '@' prefix, like in the following examples: ``@0``, ``@989``. .. TODO: Describe the syntax of the CFI index machine operands. .. TODO: Describe the syntax of the metadata machine operands, and the instructions debug location attribute. -.. TODO: Describe the syntax of the target index machine operands. .. TODO: Describe the syntax of the register live out machine operands. .. TODO: Describe the syntax of the machine memory operands. diff --git a/lib/CodeGen/MIRPrinter.cpp b/lib/CodeGen/MIRPrinter.cpp index f4f248e6053..5367216c20b 100644 --- a/lib/CodeGen/MIRPrinter.cpp +++ b/lib/CodeGen/MIRPrinter.cpp @@ -835,18 +835,6 @@ void MIPrinter::printTargetFlags(const MachineOperand &Op) { OS << ") "; } -static const char *getTargetIndexName(const MachineFunction &MF, int Index) { - const auto *TII = MF.getSubtarget().getInstrInfo(); - assert(TII && "expected instruction info"); - auto Indices = TII->getSerializableTargetIndices(); - for (const auto &I : Indices) { - if (I.first == Index) { - return I.second; - } - } - return nullptr; -} - void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx, const TargetRegisterInfo *TRI, bool ShouldPrintRegisterTies, LLT TypeToPrint, @@ -863,7 +851,8 @@ void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx, case MachineOperand::MO_Register: case MachineOperand::MO_CImmediate: case MachineOperand::MO_MachineBasicBlock: - case MachineOperand::MO_ConstantPoolIndex: { + case MachineOperand::MO_ConstantPoolIndex: + case MachineOperand::MO_TargetIndex: { unsigned TiedOperandIdx = 0; if (ShouldPrintRegisterTies && Op.isReg() && Op.isTied() && !Op.isDef()) TiedOperandIdx = Op.getParent()->findTiedOperandIdx(OpIdx); @@ -878,16 +867,6 @@ void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx, case MachineOperand::MO_FrameIndex: printStackObjectReference(Op.getIndex()); break; - case MachineOperand::MO_TargetIndex: - OS << "target-index("; - if (const auto *Name = - getTargetIndexName(*Op.getParent()->getMF(), Op.getIndex())) - OS << Name; - else - OS << "<unknown>"; - OS << ')'; - printOffset(Op.getOffset()); - break; case MachineOperand::MO_JumpTableIndex: OS << "%jump-table." << Op.getIndex(); break; diff --git a/lib/CodeGen/MachineOperand.cpp b/lib/CodeGen/MachineOperand.cpp index 2a2f8f29c48..cd8c86e782a 100644 --- a/lib/CodeGen/MachineOperand.cpp +++ b/lib/CodeGen/MachineOperand.cpp @@ -15,6 +15,7 @@ #include "llvm/Analysis/Loads.h" #include "llvm/CodeGen/MIRPrinter.h" #include "llvm/CodeGen/MachineRegisterInfo.h" +#include "llvm/CodeGen/TargetInstrInfo.h" #include "llvm/CodeGen/TargetRegisterInfo.h" #include "llvm/IR/Constants.h" #include "llvm/IR/ModuleSlotTracker.h" @@ -386,6 +387,18 @@ static void printOffset(raw_ostream &OS, int64_t Offset) { OS << " + " << Offset; } +static const char *getTargetIndexName(const MachineFunction &MF, int Index) { + const auto *TII = MF.getSubtarget().getInstrInfo(); + assert(TII && "expected instruction info"); + auto Indices = TII->getSerializableTargetIndices(); + auto Found = find_if(Indices, [&](const std::pair<int, const char *> &I) { + return I.first == Index; + }); + if (Found != Indices.end()) + return Found->second; + return nullptr; +} + void MachineOperand::printSubregIdx(raw_ostream &OS, uint64_t Index, const TargetRegisterInfo *TRI) { OS << "%subreg."; @@ -499,12 +512,16 @@ void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST, OS << "%const." << getIndex(); printOffset(OS, getOffset()); break; - case MachineOperand::MO_TargetIndex: - OS << "<ti#" << getIndex(); - if (getOffset()) - OS << "+" << getOffset(); - OS << '>'; + case MachineOperand::MO_TargetIndex: { + OS << "target-index("; + const char *Name = "<unknown>"; + if (const MachineFunction *MF = getMFIfAvailable(*this)) + if (const auto *TargetIndexName = getTargetIndexName(*MF, getIndex())) + Name = TargetIndexName; + OS << Name << ')'; + printOffset(OS, getOffset()); break; + } case MachineOperand::MO_JumpTableIndex: OS << "<jt#" << getIndex() << '>'; break; diff --git a/unittests/CodeGen/MachineOperandTest.cpp b/unittests/CodeGen/MachineOperandTest.cpp index c21bff60db0..46f50ab0151 100644 --- a/unittests/CodeGen/MachineOperandTest.cpp +++ b/unittests/CodeGen/MachineOperandTest.cpp @@ -151,4 +151,34 @@ TEST(MachineOperandTest, PrintCPI) { } } +TEST(MachineOperandTest, PrintTargetIndexName) { + // Create a MachineOperand with a target index and print it. + MachineOperand MO = MachineOperand::CreateTargetIndex(0, 8); + + // Checking some preconditions on the newly created + // MachineOperand. + ASSERT_TRUE(MO.isTargetIndex()); + ASSERT_TRUE(MO.getIndex() == 0); + ASSERT_TRUE(MO.getOffset() == 8); + + // Print a MachineOperand containing a target index and a positive offset. + std::string str; + { + raw_string_ostream OS(str); + MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr); + ASSERT_TRUE(OS.str() == "target-index(<unknown>) + 8"); + } + + str.clear(); + + MO.setOffset(-12); + + // Print a MachineOperand containing a target index and a negative offset. + { + raw_string_ostream OS(str); + MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr); + ASSERT_TRUE(OS.str() == "target-index(<unknown>) - 12"); + } +} + } // end namespace |